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The SCL enter is accustomed to positiveedge clock facts into every EEPROM machine and negativeedge clock knowledge away from each system.SERIAL Facts (SDA): The SDA pin is bi-directional forserial data transfer.

This pin is open-drain pushed and perhaps wire-ORed with any amount of other open-drain oropen-collector devices.DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1and A0 pins are gadget tackle inputs which can be really hard wiredfor the AT24C01A along with the AT24C02.

As many as eight1K/2K devices may well be addressed on a single bus method(gadget addressing is discussed in detail under the DeviceAddressing area).The AT24C04 makes use of the A2 and A1 inputs for challenging wireaddressing plus a total of 4 4K gadgets could beaddressed on the one bus system.

The A0 pin is ano join.The AT24C08 only uses the A2 input for hardwire address-ing along with a full of two 8K units could be dealt with on asingle bus procedure. The A0 and A1 pins are not any connects.The AT24C16 isn't going to use the product tackle pins, whichlimits the volume of units on a one bus to 1.

TheA0, A1 and A2 pins are no connects.Generate Safeguard (WP): The AT24C01A/02/04/16 has aWrite Guard pin that provides hardware data security.The Write Safeguard pin permits normal read/write operationswhen connected to floor (GND).

When the Compose Protectpin is linked to VCC, the generate security feature isenabled and operates as demonstrated during the subsequent table.